Testing of a device-under-test (DUT) is an integral step in a manufacturing process of the DUT. The DUT can be tested using a tester that includes a plurality of Input/Output (I/O) ports. Examples of the tester can include a very low cost tester (VLCT) or a high-end tester. Scan testing is one technique used for testing the DUT and involves shifting of data by a plurality of scan chains between a decompressor and a compressor of the DUT. Typically, the scan testing includes decompression of the data, for example external scan inputs to the DUT, by the decompressor into a plurality of scan chains or inputs and compression of the data, for example a plurality of scan outputs, by the compressor into a limited number of external scan outputs. If the DUT is a low pin count design, the DUT is more prone to aliasing errors and the compression of the data is less robust as number of scan chains is less due to limited number of external scan inputs and external scan outputs.
To increase the number of external scan inputs to the decompressor and to increase the number of external scan outputs from the compressor, a serializer-deserializer (SerDes) is included in the DUT. However, tester resources (the I/O ports) of the tester still remain under-utilized, causing reduced tester data rate and increased testing time.